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Silicon Labs /EFR32ZG23B021F512IM40 /AGC_S /CTRL6

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Interpret as CTRL6

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DUALRFPKDDEC0 (ENDUALRFPKD)ENDUALRFPKD 0GAINDETTHD

Description

No Description

Fields

DUALRFPKDDEC

Decoding matrix for dualrfpkd logic
ENDUALRFPKD

Enable dual RFPKD
GAINDETTHD

Threshold for gain aligned interrupt

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data